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71M6545/71M6545H Data Sheet
Name
Location
Rst Wk Dir
Description
TEMP_START
TMUX[5:0]
TMUX2[4:0]
28B4[6]
2502[5:0]
2503[4:0]
0
–
–
0
–
–
R/W
R/W
R/W
When TEMP_PER = 0 automatic temperature measurements are disabled, and
TEMP_START may be set by the MPU to initiate a one-shot temperature
measurement. TEMP_START is ignored in SLP mode. Hardware clears TEMP_START
when the temperature measurement is complete.
Selects one of 32 signals for TMUXOUT. See 2.5.14 for details.
Selects one of 32 signals for TMUX2OUT. See 2.5.14 for details.
TMUXR2[2:0]
TMUXR4[2:0]
TMUXR6[2:0]
270A[2:0]
270A[6:4]
2709[2:0]
000 000 R/W
The TMUX setting for the remote isolated sensors (71M6xx3).
The silicon version index. This word may be read by firmware to determine the silicon
version.
VERSION[7:0]
2706[7:0]
–
–
R
VERSION[7:0]
0001 0001
Silicon Version
A01
0001 0011
0001 0011
A03
B01
VREF_CAL
VREF_DIS
2704[7]
2704[6]
0
0
0
1
R/W
R/W
Brings the ADC reference voltage out to the VREF pin. This feature is disabled when
VREF_DIS =1.
Disables the internal ADC voltage reference.
This word describes the source of power and the status of the VDD.
VSTAT[2:0]
000
001
Description
System Power OK. V3P3A>3.0v. Analog modules are functional and
accurate. [V3AOK,V3OK]=11
System Power Low. 2.8v<V3P3A<3.0v. Analog modules not
accurate. [V3AOK,V3OK]=01
VSTAT[2:0]
SFR F9[2:0]
–
–
R
010
VDD OK. VDD>2.25v. Full digital functionality.
[V3AOK,V3OK]=00, [VDDOK,VDDgt2]=11
011
101
VDD>2.0. Flash writes are inhibited. If the TRIMVDD[5] fuse is
blown, PLL_FAST is cleared.
[V3AOK,V3OK]=00, [VDDOK,VDDgt2]=01
VDD<2.0. When VSTAT=101, processor is nearly out of voltage.
Processor failure is imminent.
[V3AOK,V3OK]=00, [VDDOK,VDDgt2]=00
WAKE_TMR
WD_RST
2880[7:0]
28B4[7]
0
0
–
0
R/W
W
Timer duration is WAKE_TMR+1 seconds.
Reset the WD timer. The WD is reset when a 1 is written to this bit. Writing a one
clears and restarts the watch dog timer.
v2
97
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